Sign in
4.8 GHz CMOS Frequency Multiplier Using Subharmonic Pulse-Injection Locking for Spurious Suppression.
Kyoya Takano
Mizuki Motoyoshi
Minoru Fujishima
Published in:
IEICE Trans. Electron. (2008)
Keyphrases
</>
high speed
power consumption
dielectric constant
clock frequency
low power
cmos technology
low cost
edge detection
analog vlsi
vlsi circuits
concurrency control
simulation software
fine granularity
database systems
floating point
circuit design
signal processing
type ii
delay insensitive