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On the Design of a Fault-Tolerant Scalable Three Dimensional NoC-Based Digital Neuromorphic System With On-Chip Learning.

Ogbodo Mark IkechukwuKhanh N. DangAbderazek Ben Abdallah
Published in: IEEE Access (2021)
Keyphrases
  • fault tolerant
  • three dimensional
  • fault tolerance
  • circuit design
  • learning systems
  • load balancing
  • low cost
  • distributed systems
  • digital libraries
  • high speed
  • high availability
  • single chip