A 0.36pJ/bit, 17Gbps OOK receiver in 45-nm CMOS for inter and intra-chip wireless interconnects.
Suryanarayanan SubramaniamTanmay ShindePadmanabh DeshmukhMd Shahriar ShamimMark IndovinaAmlan GangulyPublished in: SoCC (2017)
Keyphrases
- cmos technology
- power dissipation
- nm technology
- low power
- low voltage
- random access memory
- power consumption
- ultra low power
- silicon on insulator
- parallel processing
- mixed signal
- wireless networks
- flip flops
- wireless communication
- image sensor
- physical layer
- low cost
- analog to digital converter
- analog vlsi
- mobile devices
- cmos image sensor
- high speed
- chip design
- xilinx virtex
- digital signal processing
- power reduction
- signal processing
- fading channels
- metal oxide semiconductor
- focal plane
- end to end