A 12-Bit 31.1- $\mu$ W 1-MS/s SAR ADC With On-Chip Input-Signal-Independent Calibration Achieving 100.4-dB SFDR Using 256-fF Sampling Capacitance.
Junhua ShenAkira ShikataAnping LiuBaozhen ChenFrederick ChalifouxPublished in: IEEE J. Solid State Circuits (2019)
Keyphrases
- high speed
- analog to digital converter
- high frequency
- low power
- low cost
- received signal
- electro optic
- single chip
- camera calibration
- sigma delta
- noise ratio
- random access memory
- frequency domain
- compressive sampling
- high density
- control signals
- mixed signal
- signal processing
- parameter estimation
- power dissipation
- compressive sensing
- signal subspace
- synthetic aperture radar
- sar imaging
- radar signal
- fourier transform
- phased array
- signal acquisition
- sar images
- wide dynamic range
- power consumption