Accelerating IDS Using TLS Pre-Filter in FPGA.
Vlastimil KosarLukas SismisJirí MatousekJan KorenekPublished in: ISCC (2023)
Keyphrases
- intrusion detection system
- high speed
- noise reduction
- hardware implementation
- parameter estimation
- low cost
- field programmable gate array
- real time
- preprocessing step
- fpga implementation
- median filter
- filtering algorithm
- single chip
- fpga device
- real time image processing
- software implementation
- noise removal
- least squares
- multiresolution
- image processing