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A 1-GHz Digital PLL With a 3-ps Resolution Floating-Point-Number TDC in a 0.18-μm CMOS.

Young Hun SeoSeon-Kyoo LeeJae-Yoon Sim
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2011)
Keyphrases
  • floating point
  • scheduling problem
  • high quality
  • bayesian networks
  • high resolution
  • higher order
  • low cost
  • high speed
  • energy function