An FPGA-Based Energy-Efficient Reconfigurable Depthwise Separable Convolution Accelerator for Image Recognition.
Lei XuanKa-Fai UnChi-Seng LamRui Paulo MartinsPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2022)
Keyphrases
- image recognition
- energy efficient
- field programmable gate array
- hardware implementation
- image processing algorithms
- image processing
- wireless sensor networks
- embedded systems
- energy consumption
- sensor networks
- hardware architecture
- parallel computing
- image classification
- computing systems
- face recognition
- pattern recognition
- energy efficiency
- routing protocol
- base station
- data dissemination
- data gathering
- multi core architecture
- routing algorithm
- low cost
- feature extraction
- smart camera
- monitoring system
- data collection
- high speed
- data analysis
- massively parallel