A 2.24GHz Wide Range Low Jitter DLL-Based Frequency Multiplier using PMOS Active Load for Communication Applications.

Chih-Hsing Lin Ching-Te Chiu

Published in: ISCAS (2007)

Keyphrases

wide range
load balancing
clock frequency
communication networks
information sharing
hardware implementation
communication systems
communication overhead
dielectric constant
search algorithm
high speed
computer networks
packet loss
floating point