A Hardware Accelerator for the Semi-Global Matching Stereo Algorithm: An Efficient Implementation for the Stratix V and Zynq UltraScale+ FPGA Technology.
John A. KalomirosJohn V. VourvoulakisStavros VologiannidisPublished in: ACM Trans. Reconfigurable Technol. Syst. (2024)
Keyphrases
- fpga technology
- field programmable gate array
- hardware implementation
- stereo algorithm
- stereo matching
- parallel computing
- stereo algorithms
- embedded systems
- stereo method
- image processing algorithms
- signal processing
- disparity map
- massively parallel
- fpga device
- computing systems
- stereo pair
- smooth surfaces
- depth map
- ground truth
- image processing
- real time
- stereo vision
- curved surfaces
- stereo correspondence
- input data