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Two low-voltage high-speed CMOS frequency-insensitive PWM signal generators based on relaxation oscillator.
Montree Siripruchyanun
Poolsak Koseeyaporn
Jeerasuda Koseeyaporn
Paramote Wardkein
Published in:
ISCAS (4) (2004)
Keyphrases
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low voltage
high speed
power line
duty cycle
low power
cmos technology
design considerations
real time
random access memory
clock frequency
signal processing
power consumption
frequency domain