Hardware Acceleration of HDR-Image Tone Mapping on an FPGA-CPU Platform Through High-Level Synthesis.
Mattia CacciottiVincent CamusJeremy SchlachterAlessandro PezzottaChristian C. EnzPublished in: SoCC (2018)
Keyphrases
- parallel architecture
- tone mapping
- high level synthesis
- high dynamic range
- hardware implementation
- high dynamic range images
- dynamic range
- human perception
- parallel processing
- shared memory
- exposure fusion
- contrast enhancement
- low dynamic range
- display devices
- distributed memory
- hdr images
- gradient domain
- parallel implementation
- real time
- histogram equalization
- image quality
- signal processing
- parallel algorithm
- hdr video
- signal to noise ratio