On-chip cache hierarchy-aware tile scheduling for multicore machines.
Jun LiuYuanrui ZhangWei DingMahmut T. KandemirPublished in: CGO (2011)
Keyphrases
- parallel machines
- memory access
- shared memory
- identical machines
- scheduling problem
- manufacturing cell
- memory subsystem
- multithreading
- memory management
- identical parallel machines
- low cost
- high speed
- memory hierarchy
- wafer fabrication
- hierarchical structure
- flowshop
- high density
- data access
- resource consumption
- parallel processors
- speculative execution
- level parallelism
- single chip
- physical design
- silicon on insulator
- processing times
- transactional memory
- processor core
- memory bandwidth
- scheduling algorithm
- query processing
- analog vlsi
- prefetching
- main memory
- modular design
- cell formation
- low power
- resource allocation
- computer systems
- parallel computing
- circuit design