Login / Signup

FPGA oriented design of parity sharing RS codecs.

Gian Carlo CardarilliSalvatore PontarelliMarco ReAdelio Salsano
Published in: DFT (2005)
Keyphrases
  • single chip
  • real time
  • user interface
  • high speed
  • design principles
  • data sets
  • low cost
  • peer to peer
  • building blocks
  • bitstream
  • hardware design