A Formalization of a Subset of VHDL in the Boyer-Moore Logic.
David M. RussinoffPublished in: Formal Methods Syst. Des. (1995)
Keyphrases
- boyer moore
- pattern matching
- operational semantics
- modal logic
- logical framework
- logic programming
- sliding window
- asynchronous circuits
- hardware implementation
- classical logic
- formal logic
- sound and complete axiomatization
- knowledge representation
- temporal logic
- automated reasoning
- delay insensitive
- logical language
- integrated circuit
- digital circuits
- defeasible logic
- real time
- multi agent
- bayesian networks
- machine learning
- neural network