Multiple voltage synthesis scheme for low power design under timing and resource constraints.
Ling WangYingtao JiangHenry SelvarajPublished in: Integr. Comput. Aided Eng. (2005)
Keyphrases
- low power
- resource constraints
- power consumption
- single chip
- low cost
- vlsi architecture
- low power consumption
- high speed
- logic circuits
- gate array
- digital signal processing
- cmos technology
- power dissipation
- vlsi implementation
- mixed signal
- resource constrained
- temporal constraints
- energy dissipation
- real time
- routing problem
- low voltage
- embedded systems