edAttack: Hardware Trojan Attack on On-Chip Packet Compression.
Atul KumarDipika DebShirshendu DasPalash DasPublished in: IEEE Des. Test (2023)
Keyphrases
- low cost
- vlsi implementation
- content addressable memory
- single chip
- host computer
- programmable logic
- circuit design
- chip design
- evolvable hardware
- gigabit ethernet
- ibm zenterprise
- high speed
- ibm power processor
- hardware and software
- real time
- normal traffic
- embedded systems
- image compression
- processor core
- computer systems
- low power
- image sensor
- compression ratio
- data compression
- multithreading
- compression algorithm
- low power consumption
- physical design
- memory subsystem
- hardware implementation
- packet loss
- signal processor
- reconfigurable hardware
- floating point arithmetic
- massively parallel