5.5 V tolerant I/O in a 2.5 V 0.25 μm CMOS technology.

Anne-Johan Annema Govert Geelen Peter C. de Jong

Published in: CICC (2000)

Keyphrases

cmos technology
low power
low voltage
power consumption
spl times
input output
parallel processing
power dissipation
high speed
low cost
main memory
silicon on insulator
image sensor
pattern recognition
mixed signal
data transfer
hardware and software
real time