Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications.
Gilles SassatelliLionel TorresPascal BenoitThierry GilCamille DiouGaston CambonJérôme GalyPublished in: DATE (2002)
Keyphrases
- highly scalable
- systolic array
- data flow
- data partitioning
- web caching
- parallel architecture
- texas instruments
- software architecture
- management system
- signal processing
- conceptual model
- real time image processing
- real time
- digital signal processing
- network architecture
- master slave
- hardware implementation
- formal model
- case study
- machine learning
- databases