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Design and Analysis of Sub-DT Sub-Domino Logic Circuits for Ultra Low Power Applications.

Ashutosh NandiRajeevan Chandel
Published in: J. Low Power Electron. (2010)
Keyphrases
  • logic circuits
  • low power
  • functional decomposition
  • image analysis
  • case study
  • logic synthesis
  • pattern recognition
  • low cost
  • pattern matching
  • gate array
  • ultra low power