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Two-dimensional IC layout compaction based on topological design rule checking.
John Valainis
Sinan Kaptanoglu
Erwin Liu
Roberto Suaya
Published in:
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1990)
Keyphrases
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three dimensional
artificial intelligence
design patterns
building blocks
layout design
databases
design methodology
integrated circuit
engineering design
computer aided
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multi dimensional
control system
search algorithm
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