A Compact and Low-Power Column Readout Circuit based on Digital Delay Chain.
Minkyu YangChangjoo ParkWanyeong JungPublished in: ISCAS (2024)
Keyphrases
- low power
- power dissipation
- mixed signal
- high speed
- power consumption
- vlsi circuits
- cmos technology
- low cost
- logic circuits
- phase locked loop
- power reduction
- gate array
- circuit design
- printed circuit
- single chip
- high power
- low power consumption
- delay insensitive
- digital signal processing
- nm technology
- digital circuits
- data conversion
- wide dynamic range
- vlsi architecture
- wireless transmission
- cmos image sensor
- real time
- low voltage
- power saving
- signal processor
- image processing