Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
Gurindar S. SohiSriram VajapeyamPublished in: ISCA (1987)
Keyphrases
- instruction set
- signal processor
- parallel algorithm
- embedded processors
- parallel architecture
- memory hierarchy
- modal logic
- classical logic
- parallel processing
- data flow
- multi valued
- distributed memory
- high performance computing
- parallel computers
- parallel execution
- online learning
- pc cluster
- highly parallel
- parallel computing
- computer technology