Performance per power optimum cache architecture for embedded applications, a design space exploration.
Mehdi AlipourKamran MoshariMohammad Reza BagheriPublished in: NESEA (2011)
Keyphrases
- design space exploration
- multithreading
- memory subsystem
- embedded processors
- dynamic random access memory
- design space
- power consumption
- management system
- design process
- memory hierarchy
- computer architecture
- high level synthesis
- query processing
- parallel architecture
- hardware software partitioning
- machine learning
- embedded systems
- information systems
- memory access
- ibm zenterprise
- artificial intelligence