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Multi-threaded System Design of A Multi-Precision Deep Learning Accelerator on FPGA with Optimized Memory Usage.
Shen-Fu Hsiao
Jyun-Liang Chen
Yi Hsu
Xiang-Ting Huang
Published in:
ICCE-TW (2021)
Keyphrases
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memory usage
deep learning
multi threaded
field programmable gate array
hardware implementation
low cost
machine learning
computer architecture
natural language processing
wordnet
fine grained
computational complexity
multiscale
decision making
feature selection
social networks
multi core processors
real time