A bidirectional neural interface SoC with an integrated spike recorder, microstimulator, and low-power processor for real-time stimulus artifact rejection.
Kanokwan LimnusonHui LuHillel J. ChielPedram MohseniPublished in: CICC (2014)
Keyphrases
- low power
- high speed
- single chip
- real time
- low cost
- spike trains
- vlsi architecture
- power consumption
- low power consumption
- gate array
- signal processor
- digital signal processing
- high power
- logic circuits
- spiking neurons
- wireless transmission
- high definition television
- vlsi circuits
- mixed signal
- delay insensitive
- frame rate