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A geometric approach to chip-scale TSV shield placement for the reduction of TSV coupling in 3D-ICs.

Caleb SerafyBing ShiAnkur Srivastava
Published in: Integr. (2014)
Keyphrases
  • random access memory
  • data sets
  • scale space
  • databases
  • neural network
  • image processing
  • low cost
  • hardware implementation
  • reduction method
  • circuit design