Checking Combinational Equivalence of Speed-Independent Circuits.

Peter A. Beerel Jerry R. Burch Teresa H. Meng

Published in: Formal Methods Syst. Des. (1998)

Keyphrases

high speed
logic circuits
asynchronous circuits
delay insensitive
low power
lateral inhibition
databases
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artificial neural networks
control system
similarity measure
e learning
consistency checking
analog circuits
feature selection
learning algorithm
analog vlsi
neural network