Design of a Reversible Binary Coded Decimal Adder by Using Reversible 4-Bit Parallel Adder.

Hafiz Md. Hasan Babu Ahsan Raja Chowdhury

Published in: VLSI Design (2005)

Keyphrases

bit parallel
markov chain
pattern matching
case study
logic circuits
regular expressions
data flow
computer aided
real time
power dissipation
design tools
user experience
reversible watermarking
engineering design
design process
multi agent
data sets