Simultaneous Constrained Pin Assignment and Escape Routing for FPGA-PCB Codesign.
Seong-I LeiWai-Kei MakPublished in: FPL (2011)
Keyphrases
- hardware software
- hw sw
- real time image processing
- signal processing
- hardware implementation
- field programmable gate array
- network topology
- routing algorithm
- shortest path
- routing problem
- low cost
- high speed
- printed circuit boards
- network topologies
- real time
- hardware design
- image processing
- power reduction
- neural network