A Gate-Array-Based 666MHz VLSI Test System.

Shuji Kikuchi Yoshihiko Hayashi Takashi Suga Jun Saitou Masahiko Kaneko Takashi Matsumoto Ryozou Yoshino

Published in: ITC (1995)

Keyphrases

gate array
low power
high speed
logic circuits
data sets
pattern recognition
power consumption
genetic algorithm
artificial intelligence
signal processing
single chip
vlsi circuits
databases
information systems
vlsi design