The use of reduced two's-complement representation in low-power DSP design.
Zhan YuMeng-Lin YuKamran AzadetAlan N. Willson Jr.Published in: ISCAS (1) (2002)
Keyphrases
- low power
- digital signal processing
- high speed
- low power consumption
- low cost
- power consumption
- single chip
- logic circuits
- vlsi architecture
- gate array
- mixed signal
- real time
- ultra low power
- power reduction
- embedded systems
- design process
- processing capabilities
- power dissipation
- cmos technology
- multi channel
- high power
- signal processing
- general purpose
- vlsi circuits
- pattern recognition
- image processing