Computation reduction for statistical analysis of the effect of nano-CMOS variability on asynchronous circuits.

Zheng Xie Doug A. Edwards

Published in: DDECS (2010)

Keyphrases

asynchronous circuits
statistical analysis
delay insensitive
process algebra
efficient computation
statistical methods
high speed
model checking
nano scale
low power
power consumption
low cost
data analysis
circuit design
statistical analyses
space reduction
reduction method
genetic algorithm