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Pain versus Gain in the Hardware Design of FPUs and Supercomputers.
Roger A. Golliver
Silvia M. Müller
Stuart F. Oberman
Martin S. Schmookler
Debjit Das Sarma
Andrew Beaumont-Smith
Published in:
IEEE Symposium on Computer Arithmetic (2005)
Keyphrases
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hardware design
parallel architectures
hardware implementation
parallel computing
field programmable gate array
fpga hardware
neural network
massively parallel
high performance computing
real time
hardware description language
information systems
signal processing
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