Logic optimization for majority gate-based nanoelectronic circuits.
Zhi HuoQishan ZhangS. HaruehanroengraWei WangPublished in: ISCAS (2006)
Keyphrases
- logic synthesis
- digital circuits
- delay insensitive
- logic circuits
- optimization problems
- asynchronous circuits
- objective function
- chip design
- cmos technology
- discrete optimization
- flip flops
- classical logic
- multi valued
- global optimization
- optimization method
- optimization algorithm
- multi objective
- dynamic range
- modal logic
- analog circuits
- steady state
- field effect transistors
- logic programming
- random access memory
- data sets