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Interleaved Domain Interference Canceller for Low Latency IDMA System and Its VLSI Implementation.
Tran Thi Thao Nguyen
Leonardo Lanante
Yuhei Nagao
Masayuki Kurosaki
Shingo Yoshizawa
Hiroshi Ochi
Published in:
VTC Spring (2017)
Keyphrases
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low latency
vlsi implementation
vlsi architecture
high speed
highly efficient
real time
high throughput
virtual machine
neural network
image processing
data analysis
multiresolution