Mixed serial/parallel hardware implementation of the Berlekamp-Massey algorithm for BCH decoding in Flash controller applications.
Jürgen FreudenbergerJens SpinnerPublished in: ISSSE (2012)
Keyphrases
- hardware implementation
- image processing algorithms
- computational complexity
- learning algorithm
- signal processing
- fpga implementation
- parallel architecture
- parallel implementation
- particle swarm optimization
- hardware architecture
- fractal encoding
- pipeline architecture
- neural network
- efficient implementation
- control method
- fpga device