A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler.

Keisuke Kawahara Joe Sawada Takumi Kamo Yohtaro Umeda Kyoya Takano

Published in: RWS (2022)

Keyphrases

hd video
high definition
analog vlsi
power consumption
power supply
video transmission
circuit design
allocation scheme
focal plane
cmos image sensor
low power
real time
mixed signal
video coding
bandwidth allocation
infrared
parallel processing
video streaming
single chip
digital circuits
neural network