A low power delayed-clocks generation and distribution system.

Su Kio Kian Haur Chong Carl Sechen

Published in: ISCAS (5) (2003)

Keyphrases

low power
power consumption
low cost
high speed
single chip
high power
wireless transmission
digital signal processing
low power consumption
vlsi architecture
mixed signal
image sensor
vlsi circuits
gaussian distribution
logic circuits
power reduction
power saving
gate array