A Sub-0.5 V Differential ED-CMOS/SOI Circuit with Over-1-GHz Operation.

Takakuni Douseki Toshishige Shimamura Nobutaro Shibata

Published in: IEICE Trans. Electron. (2005)

Keyphrases

high speed
silicon on insulator
circuit design
analog vlsi
power consumption
cmos technology
clock gating
low power
delay insensitive
power dissipation
low voltage
flip flops
shift register
vlsi circuits
power reduction
real time
low cost
floating point
nm technology