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Design and Implementation of the PAPRICA Parallel Architecture.
Alberto Broggi
Gianni Conte
Francesco Gregoretti
Claudio Sansoè
Roberto Passerone
Leonardo Maria Reyneri
Published in:
J. VLSI Signal Process. (1998)
Keyphrases
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high level synthesis
parallel architecture
efficient implementation
hardware implementation
systolic array
parallel implementation
three dimensional
design process
parallel processing
computer architecture