Application Specific Adaptive Double Buffer Managed On Chip SIMD Co-Processor Architecture.
Cheong-Ghil KimShin-Dug KimPublished in: PDPTA (2003)
Keyphrases
- application specific
- instruction set
- computation intensive
- ibm power processor
- level parallelism
- general purpose
- memory access
- high bandwidth
- single instruction multiple data
- memory subsystem
- low power consumption
- high speed
- floating point arithmetic
- dynamic reconfiguration
- floating point unit
- processor array
- ibm zenterprise
- memory bandwidth
- low cost
- single chip
- parallel algorithm
- high density
- file system
- ibm eservertm
- multithreading
- floating point
- parallel processing
- memory management
- processor core
- shared memory
- software architecture
- parallel architectures
- parallel architecture
- processing units
- massively parallel
- grid computing