Standardizing the Performance Assessment of Reconfigurable Processor Architectures.
Lesley ShannonPaul ChowPublished in: FCCM (2003)
Keyphrases
- functional units
- digital signal
- systolic array
- reconfigurable architecture
- heterogeneous computing
- multi core processors
- memory management
- parallel processing
- parallel architectures
- low cost
- hardware implementation
- interconnection networks
- general purpose
- processing elements
- instruction set
- computation intensive
- high speed
- parallel processors
- single chip
- web services
- single instruction multiple data
- fine grain
- single processor
- multi objective evolutionary