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M3FPU: Multiformat Matrix Multiplication FPU Architectures for Neural Network Computations.
Won Jeon
Yong Cheol Peter Cho
Hyun-Mi Kim
Hyeji Kim
Jaehoon Chung
Ju-Yeob Kim
Miyoung Lee
Chun-Gi Lyuh
Jinho Han
Youngsu Kwon
Published in:
AICAS (2022)
Keyphrases
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matrix multiplication
floating point unit
neural network
message passing
distributed memory
artificial neural networks
matrix factorization
back propagation
computer vision
neural network model
belief propagation
floating point
massively parallel