On-Chip Instruction Generation for Cross-Layer CNN Accelerator on FPGA.
Yiming HuShuang LiangJincheng YuYu WangHuazhong YangPublished in: ISVLSI (2019)
Keyphrases
- cross layer
- high speed
- field programmable gate array
- video streaming
- wireless networks
- single chip
- low cost
- level parallelism
- multi layer
- application layer
- mobile ad hoc networks
- multimedia services
- routing protocol
- quality of service
- hardware implementation
- scalable video
- wireless ad hoc networks
- low complexity
- multimedia
- real time