A 1.6ps peak-INL 5.3ns range two-step digital-to-time converter in 65nm CMOS.
Ahmed ElmallahMostafa Gamal AhmedAhmed ElkholyWoo-Seok ChoiPavan Kumar HanumoluPublished in: CICC (2018)
Keyphrases
- analog to digital converter
- circuit design
- low voltage
- metal oxide semiconductor
- data conversion
- cmos technology
- low cost
- wide range
- cmos image sensor
- low power
- high speed
- neural learning
- routing protocol
- power reduction
- control method
- single phase
- post processing
- high voltage
- wireless sensor networks
- real time
- multi layer neural network