An FPGA Implementation of Explicit-State Model Checking.
Mary Ellen FuessMiriam LeeserTim LeonardPublished in: FCCM (2008)
Keyphrases
- model checking
- temporal logic
- fpga implementation
- finite state machines
- transition systems
- automated verification
- finite state
- formal verification
- formal specification
- model checker
- reachability analysis
- symbolic model checking
- computation tree logic
- temporal properties
- concurrent systems
- timed automata
- formal methods
- bounded model checking
- deterministic finite automaton
- pspace complete
- epistemic logic
- verification method
- asynchronous circuits
- process algebra
- state space
- hardware implementation
- field programmable gate array
- general purpose
- software engineering
- object oriented