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Tile size selection for low-power tile-based architectures.
John Oliver
Ravishankar Rao
Michael Brown
Jennifer Mankin
Diana Franklin
Frederic T. Chong
Venkatesh Akella
Published in:
Conf. Computing Frontiers (2006)
Keyphrases
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low power
power consumption
high speed
low cost
arbitrary size
single chip
vlsi architecture
high power
vlsi circuits
wireless transmission
digital signal processing
logic circuits
low power consumption
energy dissipation
image sensor
real time
nm technology
mixed signal
computational complexity