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Novel cascode NCLSCR/PCLSCR design with tunable holding voltage for safe whole-chip ESD protection.

Ming-Dou KerHun-Hsien Chang
Published in: CICC (1998)
Keyphrases
  • design process
  • single chip
  • user interface
  • high speed
  • circuit design
  • real time
  • low cost
  • design methodology
  • transmission line
  • operating system
  • computer aided
  • low power