A robust and real-time DNN-based multi-baseline stereo accelerator in FPGAs.

Yu Zhang Yi Zheng Yehua Ling Haitao Meng Gang Chen

Published in: J. Syst. Archit. (2023)

Keyphrases

real time
multi baseline stereo
field programmable gate array
dynamic programming
stereo vision
parallel implementation
image processing
embedded systems
computing systems
smart camera