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A novel high-speed low-power dynamic comparator with complementary differential input in 65 nm CMOS technology.
Hossein Ghasemian
Razieh Ghasemi
Ebrahim Abiri
Mohammad Reza Salehi
Published in:
Microelectron. J. (2019)
Keyphrases
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low power
cmos technology
high speed
power consumption
low cost
low voltage
single chip
flip flops
power dissipation
digital signal processing
real time
image sensor
power reduction
mixed signal
silicon on insulator
frame rate
nm technology